This is a Divisional Application of application Ser. No. 10/922,172, filed Aug. 20, 2004 now U.S. Pat. No. 7,132,358, which is an U.S. nonprovisional patent application claiming priority under 35 U.S.C. 119 to Korean Patent Application No. 2003-58003, filed on Aug. 21, 2003, the contents of both of which are hereby incorporated by reference in their entirety.
1. Field of the Invention
The present invention relates generally to a method of forming a flip chip solder bump that may be used for connecting flip chips of semiconductor goods, and more particularly, to a method of forming the flip chip solder bump without defects on a surface of a wafer or the solder bump.
2. Description of the Related Art
Three methods of connecting a chip to a carrier are wire bonding, tape automated bonding (TAB), and using a flip chip connection. Solder bumps may be formed on a wafer or the carrier to electrically connect the chip to the carrier using the TAB and the flip chip connection methods.
According to conventional wisdom, an under bump metallurgy (UBM) layer may be formed by sputtering and a solder bump may be formed by electroplating. When these conventional methods are implemented, a photoresist pattern may be removed by a stripper and the UBM layer may be etched after forming the solder bump by electroplating.
FIGS. 1 through 4 are cross-sectional views illustrating a conventional method of manufacturing a solder bump. Referring to FIG. 1, a passivation layer 5 may be formed on a wafer 1 having a pad 3. The passivation layer 5 may be formed so that a portion of the pad 3 may remain exposed. A polyimide 7 may be formed on the passivation layer 5, leaving a portion of the passivation layer 5 exposed near the exposed pad 3.
A shown in FIG. 2, a UBM layer 9 may be formed by sputtering on an upper portion of the structure depicted in FIG. 1, and a photoresist pattern 11 may be formed on the UBM layer 9. The photoresist pattern 11 may be provided with an opening 10 that exposes a portion of the UBM layer 9 above the pad 3.
Referring to FIGS. 3 and 4, a solder bump 13 may be formed by filling the opening 10 with a solder material by electroplating. The photoresist pattern 11 may be removed by a stripper, and the UBM layer 9 may be etched until a UBM layer 9a only remains under the solder bump 13.
A chemical etchant containing an acid such as nitric acid, sulphuric acid, or hydrofluoric acid (for example) may be used in the etching process of the UBM layer 9. However, the chemical etchant may cause several problems. First, a surface defect may occur on a wafer since UBM residue may remain after the etching process. As illustrated in FIG. 5, UBM residue 15 may cause an electrical short between adjacent solder bumps 13. Second, a surface defect may occur on the solder bump 13 itself. The surface defect may occur if the etchant for removing the UBM layer 9 reacts with the solder bump 13, thereby forming an oxide (e.g., a PbO crystal) on the surface of the solder bump 13. The formed oxide may weaken an adhesive strength of a connection between the solder bump 13 and a printed circuit board (PCB). Third, the oxide on the surface of the solder bump 13 may cause solder residue to remain on unintended portions of the wafer surface after a solder bump reflow process.
The shortcomings associated with conventional solder bump forming techniques may stem from the etchant used when etching the UBM layer.